logo EDITE Jean-Francois NAVINER
Identité
Jean-Francois NAVINER
État académique
Thèse soutenue
Titulaire d'une HDR (ou équivalent) 2008-11-01
Laboratoire: personnel permanent
Direction de thèses (depuis 2007)
0
Voisinage
Ellipse bleue: doctorant, ellipse jaune: docteur, rectangle vert: permanent, rectangle jaune: HDR. Trait vert: encadrant de thèse, trait bleu: directeur de thèse, pointillé: jury d'évaluation à mi-parcours ou jury de thèse.
Productions scientifiques
doi:10.1016/j.microrel.2010.07.095
An efficient tool for reliability improvement based on TMR
Microelectronics Reliability Journal, Elsevier, Vol. 50, No. 9-11, pp. 1247--1250 2010-10
GGS-ESREF-2010
Using error tolerance of target application for efficient reliability improvement of digital circuits
European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Monte Cassino, Italie 2010-10
ECM-ESREF-2010
An Efficient Tool for Reliability Improvement Based on TMR
European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Monte Cassino, Italie 2010-10
DTF-SBCCI-2010
On Evaluating The Signal Reliability of Self-checking Arithmetic Circuits
Symposium on Integrated Circuits and System Design (SBCCI), IEEE, Sãao Paulo 2010-09
ECM:MWSCAS2010
Effective Metrics for Reliability Analysis
IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Seattle, Washington, USA 2010-08
ECM:MWSCAS2010b
A Method for Efficient Implementation of Reliable Processors
IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Seattle, Washington, USA 2010-08