logo EDITE Hassan ABOUSHADY
Identité
Hassan ABOUSHADY
État académique
Thèse soutenue le 2002-01-07
Titulaire d'une HDR (ou équivalent) 2010-06-03
Laboratoire: personnel permanent
Direction de thèses (depuis 2007)
2
Propositions de sujets de thèse
Voisinage
Ellipse bleue: doctorant, ellipse jaune: docteur, rectangle vert: permanent, rectangle jaune: HDR. Trait vert: encadrant de thèse, trait bleu: directeur de thèse, pointillé: jury d'évaluation à mi-parcours ou jury de thèse.
Productions scientifiques
edite:133279231937
A 4th Order Subsampled RF ΣΔ ADC Centered at 2.4GHz with a Sine-Shaped Feedback DAC
European Solid-State Circuits Conference (ESSCIRC'11) 2011
edite:1332792415385
Sine-Shaping Mixer for Continuous-Time ΣΔ ADCs
IEEE International Symposium on Circuits and Systems (ISCAS'11) 2011
edite:1332792427464
A Generalized Approach to Design CT Sigma-Delta Ms based on FIR DAC
ISCAS IEEE International Symposium on Circuits and Systems 2010
edite:1332792436525
Automatic Design of RF Linear Transconductor
LASCAS IEEE Circuits and Systems Society Latin American Symposium on Circuits and Systems, Foz do Iguaçu, Brésil 2010
edite:1332792449569
Continuous-Time Sigma-Delta Modulators With VCO-Based Voltage-to-Phase and Volage-to-Frequency Quantizers
Midwest Symposium on Circuits and Systems (MWSCAS), Seattle, Etats-Unis 2010
edite:1332792467695
Main Defects of LC-Based ΣΔ Modulators
IEEE International Midwest Symposium on Circuits and Systems (MWSCAS'10) 2010
edite:1332792464673
Jitter Analysis of Bandpass Continuous-Time Sigma-Delta Ms for Different Feedback DAC Shapes
ISCAS IEEE International Symposium on Circuits and Systems 2010
ftp://asim.lip6.fr/pub/reports/2010/ar.haghi.mwscas.1.2010.pdf
LNA Automatic Synthesis and Characterization for Accurate RF System-Level Simulation
MWSCAS Midwest Symposium on Circuits and Systems, Seattle, Etats-Unis 2010
edite:1332792478709
Modeling Jitter in Continuous-Time Sigma-Delta Modulators
IEEE International Behavioral Modeling and Simulation Conference (BMAS'10) 2010
edite:1332792500822
Simple Architecture for Subsampling LC-based ΣΔ Modulators
Vol. 46, No. 18, pp. 1263-1264 2010
edite:1332792504850
SystemC AMS models for low-power heterogeneous designs : Application to a WSN for the detection of seismic perturbations
Workshop on Ultra-Low Power Sensor Networks (WUPS), Hannover Germany 2010
edite:1332792504849
Systematic Design of Continuous-Time Sigma-Delta Modulators with VCO-Based Quantizers
IEEE International Symposium on Circuits and Systems (ISCAS), Paris, France 2010
ftp://asim.lip6.fr/pub/reports/2009/ar.beill.rfic.1.2009.pdf
A 1.3V 26mW 3.2GS/s Undersampled LC Bandpass Sigma-Delta ADC for a SDR ISM-band Receiver in 130nm CMOS
RFIC IEEE Radio Frequency Integrated Circuits Symposium, Boston, MA, USA 2009
978 1 4244 5090 9
A Q-enhanced LC bandpass filter using CAIRO
In this paper, we present a systematic design procedure for Q-enhanced integrated LC filters, which does not require any simulations and is thus suitable for design automation. The design procedure has been described in the CAIRO analog design environment, containing the BSIM3v3 models of the MOS transistors. Precise estimations of the quality factor and the resonance frequency were made possible by adding the integrated inductance pi-model into the design environment. Several design examples of 2.4 GHz Q-enhanced LC filters are given in a 0.13 um CMOS process.
IEEE International Conference on Electronic Circuits and Systems, (ICECS), Tunisia 2009
edite:1332792527981
Automatic Model Refinement of GmC Integrators for High-Level Simulation of Continuous-Time Sigma-Delta Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan 2009
edite:13327925421082
Fast and Accurate Jitter Simulation Technique for Continuous-Time ΣΔ Modulators
Vol. 45, No. 24, pp. 1218-1219 2009
ftp://asim.lip6.fr/pub/reports/2009/ar.javid.iscas.1.2009.pdf
The Design of RF Bandpass Sigma-Delta Modulators with Bulk Acoustic Wave Resonators
ISCAS IEEE International Symposium on Circuits and Systems, Taipei, Taiwan 2009
edite:13327925661319
Using Excess Loop Delay to Simplify LC-based ΣΔ Modulators
Vol. 45, No. 25, pp. 1298-1299 2009