logo EDITE Emmanuelle ENCRENAZ
Identité
Emmanuelle ENCRENAZ
État académique
Thèse soutenue
Titulaire d'une HDR (ou équivalent) 2007-06-18
Laboratoire: personnel permanent
Direction de thèses (depuis 2007)
1
Voisinage
Ellipse bleue: doctorant, ellipse jaune: docteur, rectangle vert: permanent, rectangle jaune: HDR. Trait vert: encadrant de thèse, trait bleu: directeur de thèse, pointillé: jury d'évaluation à mi-parcours ou jury de thèse.
Productions scientifiques
edite:133279233697
Approche pour l'intégration du raffinement formel dans le processus de conception des SOC
2011
edite:1332792345154
Data Decision Diagrams for Promela Systems Analysis
Vol. 12, No. 5, pp. 337-352 2011
http://www.springerlink.com/content/dm42n88k3404741r/
Feasibility Analysis for Robustness Quantification by Symbolic Model Checking
Vol. 39, No. 2, pp. 165-184 2011
edite:1332792428476
A polynomial algorithm to prove deadlock-freeness of wormhole networks
PDP EUROMICRO Conference on Parallel, Distributed and Network-based Computing IEEE Computer Society, Pisa, Italy 2010
edite:1332792459639
Formal Verification of Timed VHDL Programs
FDL Forum on Specification & Design Languages, Southampton, UK 2010
edite:1332792491785
Quantifying Robustness by Symbolic Model checking
1st Hardware Verification Workshop (CAV workshop) 2010
edite:1332792526975
An Inverse Method for Parametric Timed Automata.
Vol. 20, No. 5, pp. 819-836 2009
edite:1332792531983
Automatic Verification of Counter Systems With Ranking Function
pp. 85-103 2009
edite:13327925331015
Complementary Formal Approaches for Dependability Analysis
Evaluating the robustness of digital circuits with respect to soft errors has
Proc. 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems 2009
edite:13327925631296
Timed Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata
Vol. 34, No. 1, pp. 59-81 2009