logo EDITE Jung Kyu CHAE
Identité
Jung Kyu CHAE
État académique
Thèse soutenue le 2014-07-09
Sujet: Un Environnement Logiciel Global pour le développement et la validation d'une plateforme de concpetion
Direction de thèse:
Encadrement de thèse:
Laboratoire:
Voisinage
Ellipse bleue: doctorant, ellipse jaune: docteur, rectangle vert: permanent, rectangle jaune: HDR. Trait vert: encadrant de thèse, trait bleu: directeur de thèse, pointillé: jury d'évaluation à mi-parcours ou jury de thèse.
Productions scientifiques
oai:hal.archives-ouvertes.fr:hal-00913885
Efficient State-Dependent Power Model for Multi-bit Flip-Flop Banks
Power consumption is one of the major issues in System-on-Chip (SoC) design with advanced semiconductor technologies for low power applications such as mobile phones. Recently, banking several 1-bit flip-flops has been proposed as a solution to reduce the power consumption in clock networks. For this purpose, to build an accurate power model for multi-bit flip-flop banks is required. However, it is an excessively timeconsuming and sophisticated work due to a high number of pins. Therefore, we first propose a simplified power characterization method to reduce characterization time. Then an efficient power modeling is introduced to create an accurate state-dependent power model for multi-bit flip-flop banks. Experimental results show that the proposed characterization method allows to linearly increase CPU time with 1.3X per bit comparing with exponentially increasing CPU time by the traditional characterization method. In addition, the proposed power modeling provides an average error of 6% compared to SPICE simulation results.
IEEE International Midwest Symposium on Circuits and Systems 2013 (MWSCAS'13) IEEE International Midwest Symposium on Circuits and Systemsconference proceeding 2013-12-03
oai:hal.archives-ouvertes.fr:hal-00953500
A formalism of the specifications for library development
In System-on-Chip (SoC) design, more and more pre-defined libraries such as standard cell library are required in order to reduce time-to-market and to ensure the functionality of complex systems. However, an amount of information such as technology parameters is needed to develop libraries. From the perspective of library providers, a crucial issue is how to deal with the specifications containing such information. Moreover, these specifications often have informality, inconsistency, and incompleteness problems. It results in increasing library development time and error. Therefore, we propose a formalism of the specifications for library development and a formal specification language based on XML.
IEEE International System-on-Chip Conference 2013 (SOCC 2013) IEEE International System-on-Chip Conferenceconference proceeding 2014-02-27
Soutenance
Thèse: Plateforme de spécification pour le développement de bibliothèques de cellules et de IPs
Soutenance: 2014-07-09
Rapporteurs: Philippe COUSSY    Naohiko SHIMIZU