État académique
Thèse soutenue le 2015-09-25
Sujet: Compilation de réseaux de processus de Kahn dans le modèle polyédrique
Direction de thèse:
Ellipse bleue: doctorant, ellipse jaune: docteur, rectangle vert: permanent, rectangle jaune: HDR. Trait vert: encadrant de thèse, trait bleu: directeur de thèse, pointillé: jury d'évaluation à mi-parcours ou jury de thèse.
Productions scientifiques
https://hal.inria.fr/hal-01154812 [Research Report] RR-8706, INRIA. 2015, pp.37Reports 2015-05
Improved Loop Tiling based on the Removal of Spurious False Dependences
Selected for presentation at the HiPEAC 2013 Conf.
International audience
To preserve the validity of loop nest transformations and parallelization, data-dependences need to be analyzed. Memory dependences come in two varieties: true dependences or false dependences. While true dependences must be satisfied in order to preserve the correct order of computations, false dependences are induced by the reuse of a single memory location to store multiple values. False dependences reduce the degrees of freedom for loop transformations. In particular, loop tiling is severely limited in the presence of these dependences. While array expansion removes all false dependences, the overhead on memory and the detrimental impact on register-level reuse can be catastrophic. We propose and evaluate a compilation technique to safely ignore a large number of false dependences in order to enable loop nest tiling in the polyhedral model. It is based on the precise characterization of interferences between live range intervals, and it does not incur any scalar or array expansion. Our algorithms have been implemented in the Pluto polyhedral compiler, and evaluated on the PolyBench suite.
ACM Transactions on Architecture and Code Optimization https://hal.inria.fr/hal-00786674 ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery (ACM), 2013, 9 (4), <10.1145/2400682.2400711>Journal articles 2013
PENCIL: Towards a Platform-Neutral Compute Intermediate Language for DSLs
International audience
We motivate the design and implementation of a platform-neutral compute intermediate language (\pencil) for productive and performance-portable accelerator programming.
WOLFHPC 2012 - 2nd Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing https://hal.inria.fr/hal-00786828 WOLFHPC 2012 - 2nd Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing, Nov 2012, Salt Lake City, Utah, United States. 2012Conference papers 2012-11-16
Thèse: Improving Tiling, Reducing Compilation Time, and Extending the Scope of Polyhedral Compilation
Soutenance: 2015-09-25
Rapporteurs: Paul KELLY    Cedric BASTOUL